DVClub Austin – September 13 – Presentations by Vikram Khosa and Vaibhav Agrawal of ARM

Please join us on September 13th at the Norris Conference Center for a catered lunch and networking. We will enjoy two presentations. The first is by Vikram Khosa, and the second is by Vaibhav Agrawal, both of ARM. 

• 11:30am—Doors Open / Networking
  


• 12:00pm—Lunch / Presentation by Vikram Khosa, ARM
  


• 12:30pm—Presentation by Vaibhav Agrawal, ARM
  


• 1:00pm—Networking
  

Presentation One:

“Deep-Formal Deployment on an A-class ARM CPU Family : An Overview and Lessons Learned!” by Vikram Khosa, ARM

• Vikram Khosa currently leads the CPU formal verification effort at ARM’s Austin design center. where he was previously memory-system verification lead for the Cortex-A15 CPU. Other experience includes CPU/ASIC/SoC verification roles with multiple companies, including 2 early-stage startups. He has a B.E. (Hons.) from BITS, Pilani and a Masters in Computer Engineering from University of Minnesota, Twin Cities
  

Presentation Two:

“Two Case Studies in Formal Deployment on ARM CPUs: Instruction-Fetch and Floating Path Datapath” by Vaibhav Agrawal, ARM

• Vaibhav Agrawal is a Validation Engineer at ARM, where he applies formal techniques to verify “Instruction-Fetch” unit, and “Floating-point datapath” units in ARM’s locally designed A-class Cores. Prior to joining ARM, Vaibhav was a design automation engineer at Intel-Austin, where he worked on various aspects of RTL design and validation flows. He has a Masters in EE from UT-Austin, and a B.Tech in EE from Indian Institute of Technology, Delhi.
  

Register now and bring your colleagues!