DVClub Austin Online – April 17, 2020 – Rich Edelman (Mentor) & Michael Bode (Arm)

DVClub online! 

Please join us for our very first DVClub Austin Online Event to be held April 17, 2020.  Rich Edelman, a Verification Technologist at Mentor, a Siemens Business, and Michael Bode, a Design Engineer at Arm willl be presenting.

• 12:00pm CDT — Presentations by Rich Edelman & Michael Bode


• All registrants will receive a link to the online event as we get closer to April 17th.

On behalf of DVClub, we hope you are all staying healthy in these “socially distant” and difficult times, and we look forward to seeing you online on the 17th.

Presentation #1

 “COVERGATE: Coverage Exposed” by Rich Edelman – Mentor, A Siemens Business

In the hardware verification world a common and popular technique for “checking” is to use coverage. Yet, as common and popular as it is, it is still the realm of the specialist or the Verification IP.  This presentation will explore and simplify coverage through examples and use models. It will explore functional coverage, line coverage, expression coverage among others. It will explore coverage debug and coverage distribution.

• Rich Edelman is a Verification Technologist specializing in helping customers adopt and deploy the UVM.  Rich has worked in ASIC companies, EDA consulting, EDA start-ups, and 2 of the big three. Rich first got involved with the UVM while developing his “RPS training class”, which was an easy way for people to learn about the methodologies.  Rich’s verification interests range from DPI and transaction recording to register modeling, sequences and class-based debug.  Rich has published many related conference papers, including a Best Paper on SystemVerilog DPI at DVCON, and various transaction recording papers with IPSOC.  Rich received a BSEE, a BSCS and an MSCS from Washington University in St. Louis.

Presentation #2

“How Design Verification Fits into a Functionally Safe World” by Michael Bode – Arm

The automotive market and other industries requiring functional safety have had an increasing demand for performance bandwidth, which has led to enabling increasingly complex CPU and SoC for use.  A key function of these standards are elevated integrity levels, which makes design verification an essential gate-keeper for the quality metrics of the IP.

• Michael Bode has been a design engineer for the past 20 years in the consumer SoC space. He has spent the last nine years at Arm on the application processor IP team with the last five as a safety engineer dedicated to ensuring those application processors meet the necessary standards to support functional safety applications. 
  

RSVP and invite some of your colleagues!