Adam Krolnik, Director of Design Verification - LSI Logic Corp

  • Adam is the verification manager of ZSP (DSP) Technology of VeriSilicon Inc. in Plano Texas.
  • His career as a verification engineer spans 20 years involving verification of microprocessors, memory systems, cache coherency systems, processor buses, and bus bridges.
  • He has also been involved in creating custom assertion tools.
  • He has been involved in the IEEE verilog standards group, and the Accellera SystemVerilog standards group. He is the co-author of "Assertion-Based Design", a book on efficient use of assertions during the design process. He is also an co-author of "Creating Assertion-Based IP", a book on using assertions in the creation of verification components.
  • Adam holds a BSEE degree from the University of Wisconsin in Madison.

Kelly Larson, MediaTek

Using PSL for Assertions and Coverage at Analog Devices - pdf

  • Kelly Larson has 20 years experience in the verification of complex microprocessors, DSPs, and SoCs.
  • Kelly is currently on assignment in Taiwan for MediaTek to help establish DV capability at their corporate headquarters.
  • Prior to his current assignment Kelly worked for 11 years at Hewlett-Packard as part of the PA RISC development team, 8 years as the Analog Devices Austin DV manager and 2 years as the MediaTek Austin DV manager.
  • Kelly has been a member of the Accellera Verification interoperability (UVM) committee.
  • He has also won multiple conference awards including CDNLive 2007 "Most Valuable Paper," DVCon 2008 "Best Paper," and SNUG San Jose 2009 "2nd Place Best Paper.

Mark McDermott, University of Texas at Austin

  • Mark McDermott has 28 years of experience in the management and product development of silicon systems.
  • Mark is also a serial entrepreneur, having co-founded six companies during his career.
  • He has led engineering teams in the development of PowerPC processors and Intel x86 processors and has 19 patents in the area of microprocessor design and test. (bio - pdf)

Jon Michelson, Cisco Systems

The Future of SystemVerilog Verification - pdf

  • Jon Michelson has over 14 years of experience designing and verifying complex systems and writing verification infrastructure tools.
  • He received his bachelor’s and masters’s degrees in electrical engineering and computer science from M.I.T.
  • He is a co-author of "The Art of Verification with SystemVerilog Assertions" and "The Art of Verification with VERA."
  • He was a co-designer of a verification language and methodology at Silicon Graphics.
  • Michelson is currently at Cisco Systems, designing and verifying complex systems.

    Jon's new book "The Art of Verification with SystemVerilog Assertions" and "The Art of Verification with Vera" can be ordered at the Verification Central web site.

Mike Pedneau, Texas Instruments

DV Employment Future - pdf

  • Mike Pedneau is DSP Verification Manager for TI's Austin location.
  • His career in verification spans 18 years, including time served at AMD, Ross, and as a verification mercenary.