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DVClub Boston – November 7, 2018 – Presenter: Cliff Cummings


November 7, 2018


11:30 am - 01:30 pm

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Westford Regency

219 Littleton Rd , Westford, MA 01886

Westford, MA, US, 01886

Please join us on November 7, 2018 at the Westford Regency for a catered lunch and networking.  Renowned industry expert Cliff Cummings of Sunburst Design will be our guess speaker.

  • 11:30am—Door Open / Networking

  • 12:00pm—Lunch / Presentation by Cliff Cummings of Sunburst Design

  • 1:00pm—Networking


“UVM Analysis Port Functionality and Using Transaction Copy Commands”

There is significant confusion surrounding UVM analysis ports and similar confusion about the UVM transaction copy command. Many verification engineers who consider themselves to be UVM experts can easily spend hours debugging analysis port issues if they are unaware of important considerations related to analysis port paths.

This presentation explains UVM analysis port usage and compares the functionality to subscriber satellite TV. The presentation shows simplified, non-UVM, analysis port implementations to clarify how the corresponding UVM port connections work. The presentation describes how the analysis port write() method efficiently calls each subscriber’s write() method. Part of the explanation describes when an analysis implementation port requires the use of a transaction copy() command.  

The presentation also describes an example of how improper handling of transactions can hide design and testbench bugs. The example shows how a bug was hidden in a scoreboard that went unnoticed for months and took hours to detect and fix once the problem was identified.

  • Cliff Cummings is President of Sunburst Design, Inc., a company that specializes in world-class SystemVerilog, Synthesis and UVM Verification training. Cliff has presented hundreds of SystemVerilog seminars and training classes and has been a featured speaker at multiple world-wide SystemVerilog and Assertion Based Verification seminars. Cliff has been an active participant on every IEEE Verilog and SystemVerilog committee, and has presented more than 50 papers on Verilog & SystemVerilog related design, synthesis, and OVM/UVM verification techniques, including more than 20 that were voted “Best Paper.” Cliff holds a BSEE from Brigham Young University and an MSEE from Oregon State University.

RSVP NOW and invite some of your colleagues!!

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